Journal of Shanghai Jiaotong University ›› 2013, Vol. 47 ›› Issue (01): 18-22.

• Radiao Electronics, Telecommunication Technology • Previous Articles     Next Articles

A Fault-Tolerant and Deadlock-Free Routing Algorithm in2D-Mesh for Network on Chip

 ZHOU  Lei-1, 2 , WU  Ning-1, LI  Yun-2   

  1. (1. College of Electronic and Information Technology, Nanjing University of Aeronautics and Astronautic, Nanjing 210016, China; 2. College of Information Engineering, Yangzhou University, Yangzhou 225009, Jiangsu, China)
  • Received:2012-07-12 Online:2013-01-30 Published:2013-01-30

Abstract: A fault-tolerant and deadlock-free routing algorithm applied in 2D-mesh was proposed to solve the problem of the permanent and unpredictable failure occurrence in network on chip. Firstly a new definition of fault block is proposed to reduce the region of fault and the affected healthy node, and then a detour-path construction algorithm is designed to implement the construction of fault block and the generation of detour-path list by recursive of message deliver. The detour-path routing algorithm combines the detour-path list and routing rules, makes a detour to avoid the fault block by adding detour-path list into the header flit. The experimental results show that the proposed algorithm achieves a reduction of average delay under uniform random distribution and hotspot distribution.  

Key words: network on chip (NoC), routing algorithm, faulttolerant, deadlock avoidance

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