Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter

Abstract

Abstract: A subtractive dither technology to improve performance for a high-resolution radiation hardening by design pipeline analog-to-digital converter was proposed. The dither signal generation is based on a deep multi-bits pseudo-random number generator driving a 5-bit high-resolution digital to analogue conversion (DAC). This dither signal is added with analog to digital converter (ADC) input signal, sampled, quantized and then digitally subtracted from the ADC output, thereby causing no significant degradation signal noise ratio (SNR). The measured results show that the proposed dither technology can efficiently improve static and dynamic performance of the ADC, especially when the ADC quantizes a small-signal input.

Key words: dither, pipeline, radiation hardening by design, analog to digital converter (ADC)

CLC Number:

TP 338

YU Jin-Shan-1, 2 , LIANG Sheng-Ming-2, MA Zhuo-1, WANG Yu-Xin-2, ZHANG Rui-Tao-2Liu-Tao-2, LI Ting-2, YU Zhou-2. Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter[J]. Journal of Shanghai Jiaotong University, 2013, 47(01): 129-133.

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Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter

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