Abstract: A novel efficient processor for computing the real-time discrete Fourier transform (DFT) on programmable field programmable gates array (FPGA) devices was presented. Prime factor Fourier transform (PFFT) algorithm was implemented in the proposed processor. Pipelined architecture was applied to maintain the realtime performance of the processor. Distributed arithmetic based on Look-up-table (LUT) was exploited to adapt to the basic logic cell of the FPGA. Cyclic convolution feature of the prime length DFT was used to significantly reduce the scale of LUTs. Based on the proposed method, a real-time 1 105-point processor with 16 bits precision was designed and implemented on Xilinx Virtex5 FPGA platform. Compared with existing real-time 1 024-point processors, the proposed processor consumes fewer resources while obtaining more efficient utilization of the resources.  

Key words: prime factor Fourier transform (PFFT), fast Fourier transform (FFT), field programmable gates array (FPGA), distributed arithmetic, pipelined architecture