Fully-Integrated Reconfigurable CMOS Global Navigation Satellite
 System Receivers with High-Linearity

doi:10.16183/j.cnki.jsjtu.2018.10.010

Abstract

Abstract: A fully-integrated reconfigurable CMOS receiver front-end architecture for multi-mode multi-band Global Navigation Satellite Systems (GNSSs) is proposed. Two reconfigurable channels are integrated to simultaneously process signals of any two types of bandwidth around the radio frequency (RF) bands of 1.2 and 1.57GHz. For specific circumstance which has strong interference, mixer-first structure is adopted to greatly improve the system linearity. Implemented in a 0.18μm CMOS process, the GNSS receiver front end shows a total noise figure of 2.5/2.7dB at 1.2/1.57GHz respectively, a maximum voltage gain of 110dB, and a gain dynamic range of 73dB. The input referred 1dB compression point is raised from －58dBm to －3dBm for the high-linearity receiver configuration.

Key words: Global Navigation Satellite System (GNSS) receiver, high-linearity, mixer-first, dual-channel, reconfigurable method

CLC Number:

TN 47

JIN Jing,YANG Zhaolin,LIU Litong,ZHOU Jianjun. Fully-Integrated Reconfigurable CMOS Global Navigation Satellite System Receivers with High-Linearity[J]. Journal of Shanghai Jiaotong University, 2018, 52(10): 1226-1233.

References

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Fully-Integrated Reconfigurable CMOS Global Navigation Satellite System Receivers with High-Linearity

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