Abstract: This paper presents a distributed arithmetic (DA) architecture that can efficiently implement finite impulse response (FIR) filters for biomedical signal processor applications. FIR filter design is more efficient when it uses a look-up table (LUT)-based technique rather than a serial one. The design’s performance and efficiency can be improved by using segmented memory banks as well as memory lookup for multiply operation. Verilog HDL is used to model the proposed design, and Synopsys Design Compiler tool is used for synthesis. The FIR filter architecture utilizing DA results in a 24.82% reduction in total power compared with the serial FIR structure.

Key words: distributed arithmetic (DA), serial finite impulse response (FIR) filter, biomedical signal processing, dynamic voltage and frequency scaling

摘要： 提出了一种分布式算法架构，可以有效地实现生物医学信号处理器应用中的有限脉冲响应（FIR）滤波器。当使用基于查找表（LUT）技术而不是串行技术时，FIR滤波器设计更有效。采用分段内存库和查找乘法运算的内存可以提高设计性能和效率。使用Verilog HDL对所提出的设计进行建模，并使用Synopsys Design Compiler工具进行合成。与串行FIR结构相比，采用分布式算法的FIR滤波器结构可使总功耗降低24.82%。

关键词: 分布式算法，串行有限脉冲响应滤波器，生物医学信号处理，动态电压和频率缩放