Rigid Sensor Allocation and Placement Technique for Reducing the Number of Sensors in Thermal Monitoring

doi:10.1007/s12204-017-1861-1

Abstract

Abstract: Abstract: Using embedded thermal sensors, dynamic thermal management (DTM) techniques measure runtime thermal behavior of high-performance microprocessors so as to prevent thermal runaway situations. The number of placed sensors should be minimized, while guaranteeing accurate tracking of hot spots and full thermal characterization. In this paper, we propose a rigid sensor allocation and placement technique for determining the minimal number of thermal sensors and the optimal locations while satisfying an expected accuracy of hot spot temperature error based on dual clustering. We analyze the false alarm rates of hot spots using the proposed methods in noise-free, with noise and sensor calibration scenarios, respectively. Experimental results confirm that our proposed methods are capable of accurately characterizing the temperatures of microprocessors.

Key words: thermal sensors| dynamic thermal management| allocation and placement| dual clustering

摘要： Abstract: Using embedded thermal sensors, dynamic thermal management (DTM) techniques measure runtime thermal behavior of high-performance microprocessors so as to prevent thermal runaway situations. The number of placed sensors should be minimized, while guaranteeing accurate tracking of hot spots and full thermal characterization. In this paper, we propose a rigid sensor allocation and placement technique for determining the minimal number of thermal sensors and the optimal locations while satisfying an expected accuracy of hot spot temperature error based on dual clustering. We analyze the false alarm rates of hot spots using the proposed methods in noise-free, with noise and sensor calibration scenarios, respectively. Experimental results confirm that our proposed methods are capable of accurately characterizing the temperatures of microprocessors.

关键词: thermal sensors| dynamic thermal management| allocation and placement| dual clustering

CLC Number:

TP 368

LI Xin* (李鑫), ZHOU Wei (周巍), JIANG Wen (蒋雯). Rigid Sensor Allocation and Placement Technique for Reducing the Number of Sensors in Thermal Monitoring[J]. Journal of shanghai Jiaotong University (Science), 2017, 22(4): 481-492.

References 22

[1]	LIN S C, BANERJEE K. Cool chips: Opportunitiesand implications for power and thermal management[J]. IEEE Transactions on Electron Devices, 2008,55(1): 245-255.
[2]	JAYASEELAN R, MITRA T. Dynamic thermal managementvia architectural adaptation [C]//Proceedingsof the 46th Annual Design Automation Conference.San Francisco, California, USA: IEEE, 2009: 484-489.
[3]	SHI B, ZHANG Y, SRIVASTAVA A. Dynamic thermalmanagement under soft thermal constraints [J]. IEEETransactions on Very large Scale Integration Systems,2013, 21(11): 2045-2054.
[4]	LONG J, MEMIK S O, MEMIK G, et al. Thermalmonitoring mechanisms for chip multiprocessors [J].ACM Transactions on Architecture and Code Optimization,2008, 5(2): 9:1-9:33.
[5]	MEMIK S O, MUKHERJEE R, NI M, et al. Optimizingthermal sensor allocation for microprocessors[J]. IEEE Transactions on Computer-Aided Design ofIntegrated Circuits, 2008, 27(3): 516-527.
[6]	ZHANG Y, SRIVASTAVA A. Accurate temperatureestimation using noisy thermal sensors [C]// Proceedingsof the 46th Annual Design Automation Conference.San Francisco, California, USA: IEEE, 2009:472-477.
[7]	ZHANG Y, SRIVASTAVA A. Accurate temperatureestimation using noisy thermal sensors for Gaussianand non-Gaussian cases [J]. IEEE Transactions onVery Large Scale Integration Systems, 2011, 19(9):1617-1626.
[8]	NOWROZ A N, COCHRAN R, REDA S. Thermalmonitoring of real processors: Techniques for sensorallocation and full characterization [C]//Proceedingsof the 47th Design Automation Conference. Anaheim,California, USA: IEEE, 2010: 56-61.
[9]	REDA S, COCHRAN R, NOWROZ A N. Improvedthermal tracking for processors using hard and softSensor allocation techniques [J]. IEEE Transactions onComputers, 2011, 60(6): 841-851.
[10]	RANIERI J, VINCENZI A, CHEBIRA A, et al. Eigen-Maps: Algorithms for optimal thermal maps extractionand sensor placement on multicore processors[C]//Proceedings of the 49th Annual Design AutomationConference. San Francisco, California, USA:IEEE, 2012: 636-641.
[11]	WANGW. Reach on sobel operator for vehicle recognition[C]//2009 International Joint Conference on ArtificialIntelligence. Hainan Island: IEEE, 2009: 448-451.
[12]	MUKHERJEE R, MEMIK S O. Systematic temperaturesensor allocation and placement for microprocessors[C]//Proceedings of the 43rd annual Design AutomationConference. San Francisco, California, USA:IEEE, 2006: 542-547.
[13]	LIN C R, LIU K H, CHEN M S. Dual clustering: Integratingdata clustering over optimization and constraintdomains [J]. IEEE Transactions on Knowledgeand Data Engineering, 2005, 17(5): 628-637.
[14]	JIAO L M, LIU Y L, ZOU B. Self-organizing dual clusteringconsidering spatial analysis and hybrid distancemeasures [J]. Science China Earth Sciences, 2011,54(8): 1268-1278.
[15]	BHATTACHARYA P, GAVRILOVA M L. Voronoi diagramin optimal path planning [C]//4th InternationalSymposium on Voronoi Diagrams in Science and Engineering.Glamorgan, England: IEEE, 2007: 38-47.
[16]	KESSLER R E. The alpha 21264 microprocessor [J].IEEE Micro, 1999, 19(2): 24-36.
[17]	HENNING J. SPEC CPU2000: Measuring CPU performancein the new millennium [J]. IEEE Computer,2000, 33(7): 28-35.
[18]	BURGER D C, AUSTIN T M. The simplescalar toolset, version 2. 0 [J]. ACM SIGARCH Computer ArchitectureNews, 1997, 25(3): 13-25.
[19]	BROOKS D, TIWARI V, MARTONOSI M. Wattch:A framework for architectural-level power analysis andoptimizations [C]//Proceedings of the 27th InternationalSymposium on Computer Architecture. Vancouver,British Columbia, Canada: IEEE, 2000: 83-94.
[20]	LIAO W, HE L, LEPAK K M. Temperature and supplyvoltage aware performance and power modelingat microarchitecture level [J]. IEEE Transactions onComputer-Aided Design of Integrated Circuits and Systems,2005, 24(7): 1042-1053.
[21]	WILTON S, JOUPPI N P. Cacti: An enhanced cacheaccess and cycle time model [J]. IEEE Journal Solid-State Circuits, 1996, 31(5): 677-688.
[22]	HUANG W, GHOSH S, VELUSAMY S, et al.Hotspot: A compact thermal modeling methodologyfor early-stage VLSI design [J]. IEEE Transactions onVLSI Systems, 2006, 14(5): 501-513.