A 3D Stacking Technology Based Reliable Cache Architecture

Abstract

Abstract: Focused on soft error issue in 3D integrated circuits, this paper analyzed particles tracks and characters when highenergy particles get into 3D stacking chips, and then presented a kind of 3D stacking technologybased reliable Cache architecture R3DCache after analyzing soft error vulnerability of each component of Caches. The R3DCache can greatly reduce error rate with little area and performance overheads. The analysis results show that the proposed structure can bring down soft error rate of Caches to 5% of original one with 0.52% to 4.17% area overhead, while the performance overhead can be ignored.

Key words: 3D stacking, Cache, reliability, soft error

CLC Number:

TP 333

SUN Yan, SONG Chao, LI Tie-Jun, ZHANG Min-Xuan. A 3D Stacking Technology Based Reliable Cache Architecture[J]. Journal of Shanghai Jiaotong University, 2013, 47(01): 65-69.

References

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