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YAO Shi-qing, JIANG Zhi-bin, GUO Cheng-tao, HU Hong-tao
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Abstract: Lot sequencing optimization based on ant algorithm, which solves choosing lots from buffers to be processed in semiconductor wafer fabrication system (SWFS), was proposed. Furthermore, time complexity of this algorithm was analyzed and the improved form was given. According to the characteristics of reentrant in SWFS, the algorithm was designed through constructing the model of ant algorithm based on bottlenecks, and eventually Lot priority sequencing was obtained by iterative simulation. It can be seen from the simulation result that the new algorithm is superior to common dispatching rules in shortterm scheduling.
CLC Number:
TP 391.9
YAO Shi-qing, JIANG Zhi-bin, GUO Cheng-tao, HU Hong-tao. Ant Algorithm for Lot Sequencing in Wafer Fabrication System[J]. Journal of Shanghai Jiaotong University.
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https://xuebao.sjtu.edu.cn/EN/Y2008/V42/I10/1655