This paper presents a distributed arithmetic (DA) architecture that can efficiently implement finite impulse response (FIR) filters for biomedical signal processor applications. FIR filter design is more efficient when it uses a look-up table (LUT)-based technique rather than a serial one. The design’s performance and efficiency
can be improved by using segmented memory banks as well as memory lookup for multiply operation. Verilog HDL is used to model the proposed design, and Synopsys Design Compiler tool is used for synthesis. The FIR filter architecture utilizing DA results in a 24.82% reduction in total power compared with the serial FIR structure.
GANJIKUNTA Ganesh Kumar?
,
MOHAMMED Mahaboob Basha
,
SIBGHATULLAH Inayatullah Khan
. Energy Efficient FIR Filter Design Using Distributed Arithmetic[J]. Journal of Shanghai Jiaotong University(Science), 2024
, 29(6)
: 1023
-1027
.
DOI: 10.1007/s12204-022-2490-x
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