Journal of Shanghai Jiao Tong University (Science) ›› 2019, Vol. 24 ›› Issue (3): 281-286.doi: 10.1007/s12204-019-2069-3

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Efficient Design and Optimization Method for Distributed Amplifiers

ZHANG Ying* (张瑛), LI Zeyou (李泽有), LI Xin (李鑫), YANG Hua (杨华)   

  1. (a. School of Electronic and Optical Engineering; b. School of Internet of Things, Nanjing University of Posts and Telecommunications, Nanjing 210023, China)
  • 出版日期:2019-06-01 发布日期:2019-05-29
  • 通讯作者: ZHANG Ying* (张瑛) E-mail:zhangying@njupt.edu.cn

Efficient Design and Optimization Method for Distributed Amplifiers

ZHANG Ying* (张瑛), LI Zeyou (李泽有), LI Xin (李鑫), YANG Hua (杨华)   

  1. (a. School of Electronic and Optical Engineering; b. School of Internet of Things, Nanjing University of Posts and Telecommunications, Nanjing 210023, China)
  • Online:2019-06-01 Published:2019-05-29
  • Contact: ZHANG Ying* (张瑛) E-mail:zhangying@njupt.edu.cn

摘要: A novel design and optimization method for distributed amplifiers (DAs) is proposed to make the circuit design more convenient and efficient. This method combines artificial intelligence (AI) optimization with manual design by two loops, i.e., outer manual loop and inner AI loop. The layout design is followed by AI optimization to take more influencing factors such as parasitic effect into account for the practicability. A DA with three gain cells is designed and optimized in a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology to verify the proposed method. With a chip area of only 0.55mm2, the DA provides 9.8 dB average forward gain from 1 to 15.2GHz. The output power at 1 dB output compression point is more than 7.7 dBm in the 2—14GHz frequency band and the peak power-added efficiency (PAE) is 10.6%. The measurement results validate the proposed method as a robust DA design procedure for improving circuit performance and design efficiency.

关键词: distributed amplifier (DA), artificial intelligence (AI), impedance matching, power-added efficiency (PAE)

Abstract: A novel design and optimization method for distributed amplifiers (DAs) is proposed to make the circuit design more convenient and efficient. This method combines artificial intelligence (AI) optimization with manual design by two loops, i.e., outer manual loop and inner AI loop. The layout design is followed by AI optimization to take more influencing factors such as parasitic effect into account for the practicability. A DA with three gain cells is designed and optimized in a standard 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology to verify the proposed method. With a chip area of only 0.55mm2, the DA provides 9.8 dB average forward gain from 1 to 15.2GHz. The output power at 1 dB output compression point is more than 7.7 dBm in the 2—14GHz frequency band and the peak power-added efficiency (PAE) is 10.6%. The measurement results validate the proposed method as a robust DA design procedure for improving circuit performance and design efficiency.

Key words: distributed amplifier (DA), artificial intelligence (AI), impedance matching, power-added efficiency (PAE)

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