High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array

doi:10.1007/s12204-020-2214-z

J Shanghai Jiaotong Univ Sci ›› 2021, Vol. 26 ›› Issue (4): 554-558.doi: 10.1007/s12204-020-2214-z

• • 上一篇

High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array

WU Tao (吴焘)

(School of Data and Computer Science, Sun Yat-sen University, Guangzhou 510006, China;
Shenzhen Research Institute of Sun Yat-sen University, Shenzhen 518057, Guangdong, China)

出版日期:2021-08-28 发布日期:2021-06-06
通讯作者: WU Tao (吴焘) E-mail:wutao53@mail.sysu.edu.cn

High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array

WU Tao (吴焘)

(School of Data and Computer Science, Sun Yat-sen University, Guangzhou 510006, China;
Shenzhen Research Institute of Sun Yat-sen University, Shenzhen 518057, Guangdong, China)

Online:2021-08-28 Published:2021-06-06
Contact: WU Tao (吴焘) E-mail:wutao53@mail.sysu.edu.cn

摘要/Abstract

摘要： Some fast finite impulse response (FIR) filters use a large number of look-up tables (LUTs) to configure distributed random-access memories (RAMs) and save registers. The distributed RAMs store 2M precomputed sums of M permuted operands in order to simplify the accumulation, which lays similarity to the solution of Boolean satisfiability (SAT) problem. In this work, a high-speed fault-tolerant FIR digital filter on field programmable gate array (FPGA) is proposed for hardware implementation. A shift register and an RAM are used to arrange the data flow. Generally, an N-tap digital filter only requires N embedded multipliers on FPGA. The better performance is due to high-radix words and low-latency operations. A 32-tap 8-bit FIR digital filter enjoys a throughput of 9.17MB/s, taking 109 ns to calculate one convolution. In addition, a fault-tolerant scheme by majority logic is used to correct real-time errors within digital filters.

关键词: finite impulse response (FIR) , digital filter , fault-tolerant , fast architecture

Abstract: Some fast finite impulse response (FIR) filters use a large number of look-up tables (LUTs) to configure distributed random-access memories (RAMs) and save registers. The distributed RAMs store 2M precomputed sums of M permuted operands in order to simplify the accumulation, which lays similarity to the solution of Boolean satisfiability (SAT) problem. In this work, a high-speed fault-tolerant FIR digital filter on field programmable gate array (FPGA) is proposed for hardware implementation. A shift register and an RAM are used to arrange the data flow. Generally, an N-tap digital filter only requires N embedded multipliers on FPGA. The better performance is due to high-radix words and low-latency operations. A 32-tap 8-bit FIR digital filter enjoys a throughput of 9.17MB/s, taking 109 ns to calculate one convolution. In addition, a fault-tolerant scheme by majority logic is used to correct real-time errors within digital filters.

Key words: finite impulse response (FIR) , digital filter , fault-tolerant , fast architecture

中图分类号:

TN 911.72

WU Tao (吴焘). High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array[J]. J Shanghai Jiaotong Univ Sci, 2021, 26(4): 554-558.

参考文献 10

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High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array

High-Speed Fault-Tolerant Finite Impulse Response Digital Filter on Field Programmable Gate Array

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