Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips

doi:10.1007/s12204-018-1934-9

sa ›› 2018, Vol. 23 ›› Issue (2): 235-243.doi: 10.1007/s12204-018-1934-9

Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips

MA Jiayi (马嘉翊), HAO Cong (郝聪), WANG Kundong (王坤东)

(1. Department of Instrument Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China; 2. Graduate School of Information Production and System, Waseda University, Kitakyushu-shi 808-0135, Japan)

出版日期:2018-04-01 发布日期:2018-06-19
通讯作者: WANG Kundong (王坤东) E-mail:kdwang@sjtu.edu.cn

Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips

MA Jiayi (马嘉翊), HAO Cong (郝聪), WANG Kundong (王坤东)

(1. Department of Instrument Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240, China; 2. Graduate School of Information Production and System, Waseda University, Kitakyushu-shi 808-0135, Japan)

Online:2018-04-01 Published:2018-06-19
Contact: WANG Kundong (王坤东) E-mail:kdwang@sjtu.edu.cn

摘要/Abstract

摘要： Along with higher and higher integration of intellectual properties (IPs) on a single chip, traditional bus-based system-on-chips (SoC) meets several design difficulties (such as low scalability, high power consumption, packet latency and clock tree problem). As a promising solution, network-on-chips (NoC) has been proposed and widely studied. In this work, a novel algorithm for NoC topology synthesis, which is decomposing and cluster refinement (DCR) algorithm, has been proposed to minimize the total power consumption of application-specific NoC. This algorithm is composed of two stages: decomposing with cluster generation, and cluster refinement. For partitioning and cluster generation, an initial low-power solution for NoC topology is generated. For cluster refinement, the clustering is optimized by performing floorplan to further reduce power consumption. Meanwhile, a good tradeoff between power consumption and CPU time can be achieved. Experimental results show that the proposed method outperforms the existing work.

关键词: network-on-chips (NoC), partitioning, cluster generatio, low-power solution

Abstract: Along with higher and higher integration of intellectual properties (IPs) on a single chip, traditional bus-based system-on-chips (SoC) meets several design difficulties (such as low scalability, high power consumption, packet latency and clock tree problem). As a promising solution, network-on-chips (NoC) has been proposed and widely studied. In this work, a novel algorithm for NoC topology synthesis, which is decomposing and cluster refinement (DCR) algorithm, has been proposed to minimize the total power consumption of application-specific NoC. This algorithm is composed of two stages: decomposing with cluster generation, and cluster refinement. For partitioning and cluster generation, an initial low-power solution for NoC topology is generated. For cluster refinement, the clustering is optimized by performing floorplan to further reduce power consumption. Meanwhile, a good tradeoff between power consumption and CPU time can be achieved. Experimental results show that the proposed method outperforms the existing work.

Key words: network-on-chips (NoC), partitioning, cluster generatio, low-power solution

中图分类号:

TP 302

MA Jiayi (马嘉翊), HAO Cong (郝聪), WANG Kundong (王坤东). Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips[J]. sa, 2018, 23(2): 235-243.

MA Jiayi (马嘉翊), HAO Cong (郝聪), WANG Kundong (王坤东). Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips[J]. Journal of Shanghai Jiao Tong University (Science), 2018, 23(2): 235-243.

参考文献 12

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Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips

Decomposing and Cluster Refinement Design Method for Application-Specific Network-on-Chips

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