A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic

doi:10.1007/s12204-014-1486-6

上海交通大学学报（英文版） ›› 2014, Vol. 19 ›› Issue (2): 169-172.doi: 10.1007/s12204-014-1486-6

A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic

ZHU Nian-hao* (朱念好), ZHOU Yu-jie (周玉洁), LIU Hong-ming (刘红明)

(School of Electronic Information and Electrical Engineering, Shanghai Jiaotong University, Shanghai 200240, China)

出版日期:2014-04-30 发布日期:2014-04-29
通讯作者: ZHU Nian-hao (朱念好) E-mail:zhunianhao2005@163.com

A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic

ZHU Nian-hao* (朱念好), ZHOU Yu-jie (周玉洁), LIU Hong-ming (刘红明)

(School of Electronic Information and Electrical Engineering, Shanghai Jiaotong University, Shanghai 200240, China)

Online:2014-04-30 Published:2014-04-29
Contact: ZHU Nian-hao (朱念好) E-mail:zhunianhao2005@163.com

摘要/Abstract

摘要： Leakage power analysis (LPA) attacks aim at finding the secret key of a cryptographic device from measurements of its static (leakage) power. This novel power analysis attacks take advantage of the dependence of the leakage power of complementary metal oxide semiconductor (CMOS) integrated circuits on the data they process. This paper proposes symmetric dual-rail logic (SDRL), a standard cell LPA attack countermeasure that theoretically resists the LPA attacks. The technique combines standard building blocks to make new compound standard cells, which are close to constant leakage power consumption. Experiment results show SDRL is a promising approach to implement an LPA-resistant crypto processor.

关键词: correlation power analysis, cryptograph, differential power analysis, leakage power analysis (LPA), power analysis, simple power analysis

Abstract: Leakage power analysis (LPA) attacks aim at finding the secret key of a cryptographic device from measurements of its static (leakage) power. This novel power analysis attacks take advantage of the dependence of the leakage power of complementary metal oxide semiconductor (CMOS) integrated circuits on the data they process. This paper proposes symmetric dual-rail logic (SDRL), a standard cell LPA attack countermeasure that theoretically resists the LPA attacks. The technique combines standard building blocks to make new compound standard cells, which are close to constant leakage power consumption. Experiment results show SDRL is a promising approach to implement an LPA-resistant crypto processor.

Key words: correlation power analysis, cryptograph, differential power analysis, leakage power analysis (LPA), power analysis, simple power analysis

中图分类号:

TN 918

ZHU Nian-hao* (朱念好), ZHOU Yu-jie (周玉洁), LIU Hong-ming (刘红明). A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic[J]. 上海交通大学学报（英文版）, 2014, 19(2): 169-172.

ZHU Nian-hao* (朱念好), ZHOU Yu-jie (周玉洁), LIU Hong-ming (刘红明). A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic[J]. Journal of shanghai Jiaotong University (Science), 2014, 19(2): 169-172.

参考文献

[1] Alioto M, Poli M, Rocchi S. A general power model of differential power analysis attacks to static logic circuits [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2010, 18(5): 711-724.
[2] Popp T. An introduction to implementation attacks and countermeasures [C]//Proceedings of the 7th IEEE International Conference on Formal Methods and Models for Co-Design. Piscataway, NJ, USA:IEEE Press, 2009: 108-115.
[3] Brier E, Clavier C, Olivier F. Correlation power analysis with a leakage model [J]. Cryptographic Hardware and Embedded Systems, 2004, 3156: 16-29.
[4] Guneysu T, Moradi A. Generic side-channel countermeasures for reconfigurable devices [J]. Cryptographic Hardware and Embedded Systems, 2011, 6917:33-48.
[5] Abdollahi F, Fallah F, Pedram M. Leakage current reduction in CMOS VLSI circuits by input vector control [J]. IEEE Transactions on Very Large Scale Integration(VLSI) Systems, 2004, 12(2): 140-154.
[6] Alioto M, Giancane L, Scotti G, et al. Leakage power analysis attacks: A novel class of attacks to nanometer cryptographic circuits [J]. IEEE Transactions on Circuits and Systems. I: Regular Papers, 2010,57(2): 355-367.
[7] Lin L, Burleson W. Leakage-based differential power analysis (LDPA) on sub-90nm CMOS cryptosystems[C]//Proceedings of IEEE International Symposium on Circuits and Systems. Seattle, Piscataway, NJ, USA:IEEE Press, 2008: 252-255.
[8] Djukanovic M, Giancane L, Scotti G, et al. Impact of process variations on LPA attacks effectiveness[C]//Proceedings of Second International Conference on Computer and Electrical Engineering. Piscataway,NJ, USA: IEEE Press, 2009: 102-106.
[9] Djukanovic M, Giancane L, Scotti G, et al. Leakage power analysis attacks: Effectiveness on DPA resistant logic styles under process variations[C]//Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS). Piscataway, NJ, USA:IEEE Press, 2011: 2043-2046.
[10] Alioto M, Giancane L, Scotti G, et al. Leakage power analysis attacks: Theoretical analysis and impact of variations [C]// Proceedings of 16th IEEE International Conference on Electronics, Circuits, and Systems. Piscataway, NJ, USA: IEEE Press, 2009: 85-88.
[11] Tiri K, Verbauwhede I. A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation[C]// Proceedings of Design, Automation and Test in Europe Conference and Exhibition. Piscataway,NJ, USA: IEEE Press, 2004: 246-251.

A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic

A Standard Cell-Based Leakage Power Analysis Attack Countermeasure Using Symmetric Dual-Rail Logic

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