Realization of False Target Jamming Signal Based on Zedboard Hardware Platform
LIU Yuntao1,3, LU Manjun2, ZHANG Wenxu1,3, HU Jianbo4
1. School of Information and Communication Engineering,Harbin Engineering University,Harbin 150001,Heilongjiang China;2. Shanghai Radio Equipment Research Institute,Shanghai 201109,China;3. Key Laboratory of Advanced Marine Communication and Information Technology, Ministry of Industry and Information Technology, Harbin Engineering University, Harbin 150001, Heilongjiang, China;4. 91411 troops of the Chinese People's
Liberation Army,Dalian 116041,Liaoning, China
Abstract With the development of radar jamming technology in electronic warfare, multi-false target jamming has become an important jamming style against radar. This paper uses Zedboard-based FPGA hardware platform to realize false target jamming signal. This method can be used in the processing of radar signal interference modulation part of DRFM system. DRFM system can achieve high-fidelity replication of radar signal. At the same time, for the characteristics of radar signal such as large bandwidth, variable modulation patterns, the method of intermittently sampling and transmitting jamming based on delay superposition is adopted to design and realize false target jamming signal, which can quickly and accurately generate jamming signal and greatly reduce the requirements of the hardware system. The verification results show that this method can realize false target jamming to radar signal.