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A Cryogenic 10-bit Successive Approximation Register Analog-to-Digital Converter Design with Modified Device Model
ZHAO Yi-qiang1* (赵毅强), YANG Ming1 (杨 明), ZHAO Hong-liang2 (赵宏亮)
A Cryogenic 10-bit Successive Approximation Register Analog-to-Digital Converter Design with Modified Device Model
ZHAO Yi-qiang1* (赵毅强), YANG Ming1 (杨 明), ZHAO Hong-liang2 (赵宏亮)
上海交通大学学报（英文版） . 2013, (
5
): 520 -525 . DOI: 10.1007/s12204-013-1436-8