上海交通大学学报

上海交通大学学报（自然版） ›› 2013, Vol. 47 ›› Issue (01): 161-166.

• 自动化技术、计算机技术 • 上一篇    

三态内容寻址存储器与多核网络处理器结合的IP查找加速模型

石巍，卢泽新，孙志刚   

  1. （国防科学技术大学 计算机学院， 长沙 410073）  
  • 收稿日期:2012-06-12 出版日期:2013-01-30 发布日期:2013-01-30
  • 基金资助:

    国家重点基础研究发展规划（973）项目（2009CB320503, 2012CB315906）, 国家高技术研究发展计划（863）项目（2011AA01A10）资助

TCAM and Multi-core Network Processor Cooperative IP Lookup Acceleration Model

 SHI  Wei, LU  Ze-Xin, SUN  Zhi-Gang   

  1. （College of Computer, National University of Defense Technology, Changsha 410073, China）
  • Received:2012-06-12 Online:2013-01-30 Published:2013-01-30

摘要： 提出了一种三态内容寻址存储器(TCAM)与多核网络处理器(NP)相结合的IP报文路由查表加速模型.将前缀长度大于24的表项存放在硬件TCAM中；将前缀长度小于等于24的转发表项组织成压缩的二叉树形式，依据该数据结构截取其中部分表项并存放在硬件中，将其他部分存放在NP的2级缓存中，并将该部分的内存地址索引存放在TCAM中以加速查找；在静态随机存储器中存放转发信息，以最大限度地减小NP报文查表所需访存时延.结果表明：所提出的报文处理模型的可扩展性强，当路由表规模扩大时，其存储资源开销几乎不增加；而利用NP的多线程特性，其报文转发的理论吞吐量可达100 Gb/s的级别，能够满足现有核心路由器的转发需求.    

关键词: 三态内容寻址存储器, 多核网络处理器, 加速模型, 时延

Abstract: This article proposed a ternary content addressable memory (TCAM) and multi-core network processor (NP) cooperated Internet Protocol (IP) lookup acceleration model. The core idea of this model includes three parts. First the routing table entries whose prefix length exceeds 24 are located in TCAM, Secondly, the remaining table entries are structured into a compresses binary tree which is utilized to determine which part to be put into hardware. The other part is located into NP’s level2 cache and their memory indexes are stored in TCAM to accelerate lookup. At last forwarding information is put into static random access memory (SRAM) which reduces the delay of NP’s packet processing at highest degree. The packet processing model has great scalability which cost little incremental storage resources as routing table size expands and with the muti-thread characteristic of NP，the total throughput of our model can reach 100 Gb/s theoretically,which can completely satisfy the forwarding demands of current core routers. Key words：

Key words: ternary content addressable memory (TCAM), multi-core network processor (NP), acceleration model, delay

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